Radio Er Nada FM

Description

The MC14046B phase locked loop contains two phase comparators, a voltage–controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. The self–bias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator 1 (an exclusive OR gate) provides a digital error signal PC1out, and maintains 90° phase shift at the center frequency between PCAin and PCBin signals (both at 50% duty cycle). Phase comparator 2 (with leading edge sensing logic) provides digital error signals, PC2out and LD, and maintains a 0° phase shift between PCAin and PCBin signals (duty cycle is immaterial). The linear VCO produces an output signal VCOout whose frequency is determined by the voltage of input VCOin and the capacitor and resistors connected to pins C1A, C1B, R1, and R2. The source–follower output SFout with an external resistor is used where the VCOin signal is needed but no loading can be tolerated. The inhibit input Inh, when high, disables the VCO and source follower to minimize standby power  consumption. The zenerdiode can be used to assist in Power Suplly regulation. 

Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication, frequency discrimination, tone decoding, data synchronization and conditioning, voltage–to–frequency
conversion and motor speed control.

Features

• Buffered Outputs Compatible with MHTL and Low–Power TTL
  

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 to 18 V

• Pin–for–Pin Replacement for CD4046B and HCF4046
  

• Phase Comparator 1 is an Exclusive Or Gate and is Duty Cycle Limited

• Phase Comparator

• HCF4060 - PLL Oscillator Reference

  Written by BuSan

  Monday, 11 December 2006

  DESCRIPTION  The HCF4060B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages.  The HCF4060B consists of an oscillator section and 14 ripple carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits.  A RESET input is provided which reset the counter to the all 0’s state and disable oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of f1 (and f0). All inputs and outputs are fully buffered. Schmitt trigger action on the clock pin permits unlimited clock rise and fall time. Features  MEDIUM-SPEED OPERATION COMMON RESET  FULLY STATIC OPERATION BUFFERED INPUTS AND OUTPUTS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I1= 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"